Replacing MOSFETs with Single Electron Transistors (SET) to Reduce Power Consumption of an Inverter Circuit
نویسنده
چکیده
Abstract— According to the rules of quantum mechanics there is a non-vanishing probability of for an electron to tunnel through a thin insulating barrier or a thin capacitor which is not possible according to the laws of classical physics. Tunneling of electron through a thin insulating barrier or tunnel junction is a random event and the magnitude of current flowing due to the tunneling of electron is very low. As the current flowing through a Single Electron Transistor (SET) is the result of electron tunneling through tunnel junctions of its source and drain the supply voltage requirement is also very low. As a result, the power consumption across a Single Electron Transistor is ultra-low in comparison to that of a MOSFET. In this paper simulations have been done with PSPICE for an inverter built with both SETs and MOSFETs. 35mV supply voltage was used for a SET built inverter circuit and the supply voltage used for a CMOS inverter was 3.5V.
منابع مشابه
A Novel Design of Quaternary Inverter Gate Based on GNRFET
This paper presents a novel design of quaternary logic gates using graphene nanoribbon field effect transistors (GNRFETs). GNRFETs are the alternative devices for digital circuit design due to their superior carrier-transport properties and potential for large-scale processing. In addition, Multiple-valued logic (MVL) is a promising alternative to the conventional binary logic design. Sa...
متن کاملReconfigurable pseudo-NMOS-like logic with hybrid MOS and single-electron transistors
A novel reconfigurable hybrid single electron transistor/MOSFET (SETMOS) circuit architecture, namely, reconfigurable pseudo-NMOS-like logic is proposed. Based on the hybrid SETMOS inverter/buffer circuit cell, reconfigurable pseudo-NMOS-like logics that can work normally at room temperature are constructed. This kind of reconfigurable logic can implement up to 2n sorts of functions at n inputs...
متن کاملSimulation of Asymmetric Doped High Performance Soi- Mosfets for Vlsi Cmos Technologies
Asymmetric halo and extension implantations are examined by simulation for their usability in 45 nm and 32 nm-technology high performance SOI-MOSFETs. Tilted implantations from the source side show higher saturation currents and lower drain overlap capacitances, which improve the intrinsic MOSFET power delay product. Furthermore the asymmetry leads to an inverter chain speed benefit. The strong...
متن کاملA Novel Design of Penternary Inverter Gate Based on Carbon Nano Tube
This paper investigates a novel design of penternary logic gates usingcarbon nanotube field effect transistors (CNTFETs). CNTFET is a suitable candidate forreplacing MOSFET with some useful properties, such as the capability of having thedesired threshold voltage by regulating the diameter of the nanotubes. Multiple-valuedlogic (MVL) such as ternary, quaternary, and penternary is a promising al...
متن کاملEstimation of Propagation Delay considering Short-Circuit Current for Static CMOS Gates
| We present formula of propagation delay for static CMOS logic gates considering short-circuit current and current owing through gate capacitance and using the n-th power law MOSFET model which considers velocity saturation e ects. The short circuit current is represented by a piece-wise linear function, which enables detailed analysis of the transient behavior of a CMOS inverter. We found tha...
متن کامل